A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications

A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications

High Efficiency Video Coding, the latest video standard, uses larger and variable-sized coding units and longer interpolation filters than [H.264 over AVC] to better exploit redundancy in video signals. These algorithmic techniques enable a 50% decrease in bitrate at the cost of computational comple...

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Bibliographic Details
Main Authors: Tikekar, Mehul, Huang, Chao-Tsung, Sze, Vivienne, Chandrakasan, Anantha P., Juvekar, Chiraag Shashikant
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers (IEEE) 2015
Online Access:http://hdl.handle.net/1721.1/93876
https://orcid.org/0000-0002-8725-9669
https://orcid.org/0000-0002-5977-2748
https://orcid.org/0000-0003-4841-3990
https://orcid.org/0000-0003-1872-1976

Internet

http://hdl.handle.net/1721.1/93876
https://orcid.org/0000-0002-8725-9669
https://orcid.org/0000-0002-5977-2748
https://orcid.org/0000-0003-4841-3990
https://orcid.org/0000-0003-1872-1976

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