A 60GHz on-chip antenna in standard CMOS silicon technology

This paper presents a compact and efficient 60-GHz on chip antenna that may be realized with the back-end-of-line process of standard CMOS silicon Technology on low resistivity 10 Ω.cm silicon substrate. A planar tab monopole antenna structure is adopted and the feeding network is designed with 50Ω...

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Bibliographic Details
Main Authors: Yang, Wanlan, Ma, Kaixue, Yeo, Kiat Seng, Lim, Wei Meng
Other Authors: School of Electrical and Electronic Engineering
Format: Conference Paper
Language:English
Published: 2013
Subjects:
Online Access:https://hdl.handle.net/10356/101570
http://hdl.handle.net/10220/16333