IP-enabled C/C++ based high level synthesis : a step towards better designer productivity and design performance
Intellectual property (IP) core based design is an emerging design methodology to deal with increasing chip design complexity. C/C++ based high level synthesis (HLS) is also gaining traction as a design methodology to deal with increasing design complexity. In the work presented here, we present a d...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2014
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/102194 http://hdl.handle.net/10220/18835 |