An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators

An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators

This paper presents an asynchronous sub-two-step circuit architecture to reduce the complexity and power consumption of internal analog-to-digital converter (quantizer) for Continuous-Time Sigma-Delta Modulator (CTSDM). By using the proposed new circuit topology, only 1/3 of comparators for a 5-...

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Bibliographic Details
Main Authors: Tan, Xiao Liang, Chan, Pak Kwong, Dasgupta, U.
Other Authors: School of Electrical and Electronic Engineering
Format: Conference Paper
Language:English
Published: 2015
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:https://hdl.handle.net/10356/103213
http://hdl.handle.net/10220/25740

Internet

https://hdl.handle.net/10356/103213
http://hdl.handle.net/10220/25740

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