An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators
This paper presents an asynchronous sub-two-step circuit architecture to reduce the complexity and power consumption of internal analog-to-digital converter (quantizer) for Continuous-Time Sigma-Delta Modulator (CTSDM). By using the proposed new circuit topology, only 1/3 of comparators for a 5-...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2015
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/103213 http://hdl.handle.net/10220/25740 |
| _version_ | 1811677152287916032 |
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| author | Tan, Xiao Liang Chan, Pak Kwong Dasgupta, U. |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Tan, Xiao Liang Chan, Pak Kwong Dasgupta, U. |
| author_sort | Tan, Xiao Liang |
| collection | NTU |
| description | This paper presents an asynchronous sub-two-step
circuit architecture to reduce the complexity and power
consumption of internal analog-to-digital converter (quantizer) for
Continuous-Time Sigma-Delta Modulator (CTSDM). By using the
proposed new circuit topology, only 1/3 of comparators for a 5-bit
quantizer design are needed when compared with the conventional
flash based counterpart. The proposed quantizer has been
implemented and fabricated in a UMC 65-nm CMOS process. The
measured results have shown that the quantizer consumes 0.59 mW
at an operating frequency of 250 MS/s in a 1.2 V supply and
achieves 28.82 dB SNDR (4.5 ENOB) from the output spectrum. |
| first_indexed | 2024-10-01T02:32:49Z |
| format | Conference Paper |
| id | ntu-10356/103213 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T02:32:49Z |
| publishDate | 2015 |
| record_format | dspace |
| spelling | ntu-10356/1032132020-03-07T13:24:51Z An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators Tan, Xiao Liang Chan, Pak Kwong Dasgupta, U. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This paper presents an asynchronous sub-two-step circuit architecture to reduce the complexity and power consumption of internal analog-to-digital converter (quantizer) for Continuous-Time Sigma-Delta Modulator (CTSDM). By using the proposed new circuit topology, only 1/3 of comparators for a 5-bit quantizer design are needed when compared with the conventional flash based counterpart. The proposed quantizer has been implemented and fabricated in a UMC 65-nm CMOS process. The measured results have shown that the quantizer consumes 0.59 mW at an operating frequency of 250 MS/s in a 1.2 V supply and achieves 28.82 dB SNDR (4.5 ENOB) from the output spectrum. Accepted version 2015-06-03T08:12:51Z 2019-12-06T21:07:36Z 2015-06-03T08:12:51Z 2019-12-06T21:07:36Z 2014 2014 Conference Paper Tan, X. L., Chan, P. K., & Dasgupta, U. (2014). An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators. 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 710-713. https://hdl.handle.net/10356/103213 http://hdl.handle.net/10220/25740 10.1109/ISCAS.2014.6865234 en 2014 IEEE International Symposium on Circuits and Systems (ISCAS) © 2014 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/ISCAS.2014.6865234]. application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Tan, Xiao Liang Chan, Pak Kwong Dasgupta, U. An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators |
| title | An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators |
| title_full | An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators |
| title_fullStr | An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators |
| title_full_unstemmed | An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators |
| title_short | An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators |
| title_sort | asynchronous sub two step quantizer for continuous time sigma delta modulators |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits |
| url | https://hdl.handle.net/10356/103213 http://hdl.handle.net/10220/25740 |
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