An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators
This paper presents an asynchronous sub-two-step circuit architecture to reduce the complexity and power consumption of internal analog-to-digital converter (quantizer) for Continuous-Time Sigma-Delta Modulator (CTSDM). By using the proposed new circuit topology, only 1/3 of comparators for a 5-...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2015
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/103213 http://hdl.handle.net/10220/25740 |