Design of ultra-low-power 60-GHz direct-conversion receivers in 65-nm CMOS
This paper has explored an ultra-low-power design of two 60-GHz direct-conversion receivers in a 65-nm CMOS process for single-channel and multi-channel applications under the IEEE 802.15.3c standard, respectively. One subthreshold biasing 0.4-V transconductance mixer is designed with a compact quad...
| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2014
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/103285 http://hdl.handle.net/10220/19256 |