A comparative study on asynchronous Quasi-Delay-Insensitive templates
The robustness of asynchronous logic has proved useful in dealing with contemporary problems in CMOS design such as process variations and power management. However, the general cryptic nature of asynchronous logic has stymied the widespread acceptance of this alternate design technique. Fortunately...
| Main Authors: | , , , , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Language: | English |
| Published: |
2013
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| Online Access: | https://hdl.handle.net/10356/106111 http://hdl.handle.net/10220/17938 http://dx.doi.org/10.1109/ISCAS.2012.6271621 |