Looting the LUTs : FPGA optimization of AES and AES-like ciphers for authenticated encryption

Looting the LUTs : FPGA optimization of AES and AES-like ciphers for authenticated encryption

In this paper, we investigate the efficiency of FPGA implementations of AES and AES-like ciphers, specially in the context of authenticated encryption. We consider the encryption/decryption and the authentication/verification structures of OCB-like modes (like OTR or SCT modes). Their main advantage...

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Bibliographic Details
Main Authors: Khairallah, Mustafa, Chattopadhyay, Anupam, Peyrin, Thomas
Other Authors: School of Computer Science and Engineering
Format: Conference Paper
Language:English
Published: 2020
Subjects:
Engineering::Computer science and engineering
AES
FPGA
Online Access:https://hdl.handle.net/10356/142972

Internet

https://hdl.handle.net/10356/142972

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