A 12-bit branching time-to-digital converter with power saving features and digital based resolution tuning for PVT variations
This paper presents a 12-bit branching Time-to-Digital converter (TDC) fabricated in a 40 nm CMOS technology. It composes of a 6-bit coarse counter TDC, and a 6-bit fine TDC. The fine TDC utilizes a proposed branching technique to interpolate between the phases of a 16-stage gated ring oscillator, i...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2021
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/152448 |