Design of low-power high speed error-tolerant adder and its application in digital signal processing
As technology advances, errors/defects in integrated circuits become unavoidable. At the same time, the pursuit of low-power and high-speed circuits is always restricted by the conventional circuit design technology. In this context, several new technologies that regard the accuracy of circuit as a...
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| Format: | Thesis |
| Language: | English |
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2009
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| Online Access: | https://hdl.handle.net/10356/15559 |