Design of continuous-time delta-sigma modulator for sub-GHz sampling frequency
Delta-Sigma (ΣΔ) analog-to-digital converters (ADCs) are widely used in wireless transceiver. Recently, continuous-time (CT) ΣΔ ADCs gain growing interest in their lower power consumption and wider input bandwidth as compared to the discrete-time (DT) counterparts. In this thesis, the system desi...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/10356/15711 |