Deep learning-based image analysis framework for hardware assurance of digital integrated circuits
We propose a complete Artificial Intelligence (AI)/Deep Learning (DL)-based image analysis framework for hardware assurance of digital integrated circuits (ICs). Our aim is to examine and verify various hardware information by analyzing the Scanning Electron Microscope (SEM) images of an IC. In our...
| Main Authors: | , , , , , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2022
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| Online Access: | https://hdl.handle.net/10356/159572 |
| _version_ | 1826127743058706432 |
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| author | Lin, Tong Shi, Yiqiong Shu, Na Cheng, Deruo Hong, Xuenong Song, Jingsi Gwee, Bah Hwee |
| author2 | School of Electrical and Electronic Engineering |
| author_facet | School of Electrical and Electronic Engineering Lin, Tong Shi, Yiqiong Shu, Na Cheng, Deruo Hong, Xuenong Song, Jingsi Gwee, Bah Hwee |
| author_sort | Lin, Tong |
| collection | NTU |
| description | We propose a complete Artificial Intelligence (AI)/Deep Learning (DL)-based image analysis framework for hardware assurance of digital integrated circuits (ICs). Our aim is to examine and verify various hardware information by analyzing the Scanning Electron Microscope (SEM) images of an IC. In our proposed framework, we make use of DL-based methods at all essential steps of the analysis. To the best of our knowledge, this is the first such framework that makes heavy use of DL-based methods at all essential analysis steps. For image analysis tasks such as stitching misalignment detection and stacking movement regression that were previously performed mainly manually, we propose novel DL-based method and novel DL model architecture to automate these tasks. One of the salient features of our proposed framework is the heavy use of automated and semi-automated methods in preparing training data and the use of synthetic data to train a DL model. We also propose to train a preliminary DL model for training data preparation in scenarios where the noise level of the image set is high. Further, to maximally encourage model re-use, we propose various DL models that can operate on feature images thus applicable to new image sets without model re-training. By applying our proposed framework to analyzing a set of SEM images of a large digital IC, we prove its efficacy. Our DL-based methods are fast, accurate, robust against noise, and can automate tasks that were previously performed mainly manually. Overall, we show that, by applying our proposed various DL-based methods, we can largely increase the level of automation in hardware assurance of digital ICs and improve its accuracy. |
| first_indexed | 2024-10-01T07:13:30Z |
| format | Journal Article |
| id | ntu-10356/159572 |
| institution | Nanyang Technological University |
| language | English |
| last_indexed | 2024-10-01T07:13:30Z |
| publishDate | 2022 |
| record_format | dspace |
| spelling | ntu-10356/1595722022-06-28T00:49:32Z Deep learning-based image analysis framework for hardware assurance of digital integrated circuits Lin, Tong Shi, Yiqiong Shu, Na Cheng, Deruo Hong, Xuenong Song, Jingsi Gwee, Bah Hwee School of Electrical and Electronic Engineering Engineering::Electrical and electronic engineering Hardware Assurance Digital ICs We propose a complete Artificial Intelligence (AI)/Deep Learning (DL)-based image analysis framework for hardware assurance of digital integrated circuits (ICs). Our aim is to examine and verify various hardware information by analyzing the Scanning Electron Microscope (SEM) images of an IC. In our proposed framework, we make use of DL-based methods at all essential steps of the analysis. To the best of our knowledge, this is the first such framework that makes heavy use of DL-based methods at all essential analysis steps. For image analysis tasks such as stitching misalignment detection and stacking movement regression that were previously performed mainly manually, we propose novel DL-based method and novel DL model architecture to automate these tasks. One of the salient features of our proposed framework is the heavy use of automated and semi-automated methods in preparing training data and the use of synthetic data to train a DL model. We also propose to train a preliminary DL model for training data preparation in scenarios where the noise level of the image set is high. Further, to maximally encourage model re-use, we propose various DL models that can operate on feature images thus applicable to new image sets without model re-training. By applying our proposed framework to analyzing a set of SEM images of a large digital IC, we prove its efficacy. Our DL-based methods are fast, accurate, robust against noise, and can automate tasks that were previously performed mainly manually. Overall, we show that, by applying our proposed various DL-based methods, we can largely increase the level of automation in hardware assurance of digital ICs and improve its accuracy. 2022-06-28T00:49:32Z 2022-06-28T00:49:32Z 2021 Journal Article Lin, T., Shi, Y., Shu, N., Cheng, D., Hong, X., Song, J. & Gwee, B. H. (2021). Deep learning-based image analysis framework for hardware assurance of digital integrated circuits. Microelectronics Reliability, 123, 114196-. https://dx.doi.org/10.1016/j.microrel.2021.114196 0026-2714 https://hdl.handle.net/10356/159572 10.1016/j.microrel.2021.114196 2-s2.0-85109078211 123 114196 en Microelectronics Reliability © 2021 Elsevier Ltd. All rights reserved. |
| spellingShingle | Engineering::Electrical and electronic engineering Hardware Assurance Digital ICs Lin, Tong Shi, Yiqiong Shu, Na Cheng, Deruo Hong, Xuenong Song, Jingsi Gwee, Bah Hwee Deep learning-based image analysis framework for hardware assurance of digital integrated circuits |
| title | Deep learning-based image analysis framework for hardware assurance of digital integrated circuits |
| title_full | Deep learning-based image analysis framework for hardware assurance of digital integrated circuits |
| title_fullStr | Deep learning-based image analysis framework for hardware assurance of digital integrated circuits |
| title_full_unstemmed | Deep learning-based image analysis framework for hardware assurance of digital integrated circuits |
| title_short | Deep learning-based image analysis framework for hardware assurance of digital integrated circuits |
| title_sort | deep learning based image analysis framework for hardware assurance of digital integrated circuits |
| topic | Engineering::Electrical and electronic engineering Hardware Assurance Digital ICs |
| url | https://hdl.handle.net/10356/159572 |
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