A single-channel voltage-scalable 8-GS/s 8-b > 37.5-dB SNDR time-domain ADC with asynchronous pipeline successive approximation in 28-nm CMOS

A single-channel voltage-scalable 8-GS/s 8-b > 37.5-dB SNDR time-domain ADC with asynchronous pipeline successive approximation in 28-nm CMOS

This article presents a single-channel voltage-scalable 8-GS/s 8-b time-domain analog-to-digital-converter (TD-ADC). It breaks the speed limit of traditional TD-ADC by leveraging asynchronous pipeline successive approximation (APSA), which reduces the quantization period to approximate one-stage tim...

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Bibliographic Details
Main Authors: Chen, Qian, Boon, Chirn Chye, Liu, Qing, Liang, Yuan
Other Authors: School of Electrical and Electronic Engineering
Format: Journal Article
Language:English
Published: 2023
Subjects:
Engineering::Electrical and electronic engineering
Asynchronous Pipeline Successive Approximation
High Speed
Online Access:https://hdl.handle.net/10356/167258

Internet

https://hdl.handle.net/10356/167258

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