The design of a successive approximation register (SAR) ADC for BMS

The design of a successive approximation register (SAR) ADC for BMS

In this project, a 10-bit SAR ADC is proposed and designed. The ADC is set to use a power supply of 2.5V and have a sampling frequency of 10MHz, allowing for a signal input frequency of up to 5MHz to be sampled. The range of signal conversion of the ADC is from 0 to 1.25V with a digital output...

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Bibliographic Details
Main Author: Huang, Junwei
Other Authors: Siek Liter
Format: Final Year Project (FYP)
Language:English
Published: Nanyang Technological University 2023
Subjects:
Engineering::Electrical and electronic engineering::Integrated circuits
Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:https://hdl.handle.net/10356/167782

Internet

https://hdl.handle.net/10356/167782

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