Exploring network-on-chip architectures: performance optimization and experimental analysis
The rapid evolution of technology has given rise to a variety of new applications that require enhanced computational capabilities. Multi-core processors are therefore necessary in meeting these demands, yet optimizing their interconnectivity remains a challenge. The existing Network-On-Chip (NoC...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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Nanyang Technological University
2024
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| Online Access: | https://hdl.handle.net/10356/175438 |