Quantum correction hardware accelerator design on FPGA
This project investigates alternative hardware solutions for quantum error correction, focusing on replacing the slow and computationally expensive MWPM error decoder with more efficient methods. Through thorough prototyping and evaluation, the Connected Neural Network (NN) approach emerged as the s...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Final Year Project (FYP) |
| Language: | English |
| Published: |
Nanyang Technological University
2024
|
| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/176232 |