Scalable compact modeling for nanometer CMOS technology
This thesis documents the compact model developed for bulk MOSFET and double-gate MOSFET. The unified regional modeling approach is used in the physics-based scalable model development for bulk and double-gate MOSFETs. Surface potential models are developed regionally in accumulation, weak accumulat...
Main Author: | See, Guan Huei |
---|---|
Other Authors: | Zhou Xing |
Format: | Thesis |
Language: | English |
Published: |
2009
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/18733 |
Similar Items
-
A CMOS power amplifier in nanometer technology for portable applications
by: Xiao, Fei
Published: (2016) -
Passive circuit designs toward terahertz using nanometer CMOS technology
by: Ma, Kaixue, et al.
Published: (2010) -
Adiabatic CMOS circuits
by: Tan, Whee Min.
Published: (2008) -
Low power adiabatic CMOS circuits
by: Ng, Kim Wee.
Published: (2008) -
A low-offset low-quiescent nanometer CMOS power amplifier for portable applications
by: Xiao, Fei
Published: (2014)