Realistic modeling of electromigration in today’s ULSI interconnections
IC architecture makes extensively use of multiple interconnect levels with many vias that enable electrical current to flow between each level. A common failure mechanism in interconnections is the formation and the growth of voids and/or hillocks which may span across the line width and sever (or s...
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| Format: | Thesis |
| Language: | English |
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2009
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| Online Access: | https://hdl.handle.net/10356/18900 |