FPGA implementation of turbo decoders with various decoding algorithms

This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances.

Bibliographic Details
Main Author: Lu, Shanguo.
Other Authors: Gunawan, Erry
Format: Thesis
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/2385
_version_ 1824456499807649792
author Lu, Shanguo.
author2 Gunawan, Erry
author_facet Gunawan, Erry
Lu, Shanguo.
author_sort Lu, Shanguo.
collection NTU
description This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances.
first_indexed 2025-02-19T03:55:05Z
format Thesis
id ntu-10356/2385
institution Nanyang Technological University
last_indexed 2025-02-19T03:55:05Z
publishDate 2008
record_format dspace
spelling ntu-10356/23852023-03-04T00:31:57Z FPGA implementation of turbo decoders with various decoding algorithms Lu, Shanguo. Gunawan, Erry School of Computer Engineering DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition This thesis is aimed to implement turbo decoder with various iteratie decoding algorithms, and to compare their hardware requirements, speeds achievable and error performances. Master of Philosophy 2008-09-17T09:01:48Z 2008-09-17T09:01:48Z 2001 2001 Thesis http://hdl.handle.net/10356/2385 Nanyang Technological University application/pdf
spellingShingle DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition
Lu, Shanguo.
FPGA implementation of turbo decoders with various decoding algorithms
title FPGA implementation of turbo decoders with various decoding algorithms
title_full FPGA implementation of turbo decoders with various decoding algorithms
title_fullStr FPGA implementation of turbo decoders with various decoding algorithms
title_full_unstemmed FPGA implementation of turbo decoders with various decoding algorithms
title_short FPGA implementation of turbo decoders with various decoding algorithms
title_sort fpga implementation of turbo decoders with various decoding algorithms
topic DRNTU::Engineering::Computer science and engineering::Computing methodologies::Pattern recognition
url http://hdl.handle.net/10356/2385
work_keys_str_mv AT lushanguo fpgaimplementationofturbodecoderswithvariousdecodingalgorithms