Latchup analysis of deep submicrometer CMOS devices
The effects of the following factors and their combinations on latchup behaviour of a Shallow Trench Isolation (STI) CMOS latchup test structure are studied: Varying both the STI dimensions and geometry parameters of the test structure. Varying the biasing conditions of the test structure. Changing...
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| Format: | Thesis |
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2008
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| Online Access: | http://hdl.handle.net/10356/3671 |