Layout design for input/output transistors
In this project, the performance of area-efficient CMOS buffers using the octagon-type and circle-type layout for both NMOS and PMOS transistors are investigated. The performance criteria include the efficient use of layout area, output driving/ sinking capability and ESD robustness.
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| Format: | Thesis |
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2008
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| Online Access: | http://hdl.handle.net/10356/3757 |