Design of a low-voltage input-output rail-to-rail CMOS buffer
The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs.
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| Format: | Thesis |
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2008
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| Online Access: | http://hdl.handle.net/10356/3845 |