Design of a low-voltage input-output rail-to-rail CMOS buffer
The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs.
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| Other Authors: | |
| Format: | Thesis |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/3845 |
| _version_ | 1811687208571109376 |
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| author | Yang, Wenjie |
| author2 | Siek, Liter |
| author_facet | Siek, Liter Yang, Wenjie |
| author_sort | Yang, Wenjie |
| collection | NTU |
| description | The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs. |
| first_indexed | 2024-10-01T05:12:40Z |
| format | Thesis |
| id | ntu-10356/3845 |
| institution | Nanyang Technological University |
| last_indexed | 2024-10-01T05:12:40Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/38452023-07-04T15:25:09Z Design of a low-voltage input-output rail-to-rail CMOS buffer Yang, Wenjie Siek, Liter School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs. Master of Science (Integrated Circuit Design) 2008-09-17T09:38:51Z 2008-09-17T09:38:51Z 2006 2006 Thesis http://hdl.handle.net/10356/3845 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Yang, Wenjie Design of a low-voltage input-output rail-to-rail CMOS buffer |
| title | Design of a low-voltage input-output rail-to-rail CMOS buffer |
| title_full | Design of a low-voltage input-output rail-to-rail CMOS buffer |
| title_fullStr | Design of a low-voltage input-output rail-to-rail CMOS buffer |
| title_full_unstemmed | Design of a low-voltage input-output rail-to-rail CMOS buffer |
| title_short | Design of a low-voltage input-output rail-to-rail CMOS buffer |
| title_sort | design of a low voltage input output rail to rail cmos buffer |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits |
| url | http://hdl.handle.net/10356/3845 |
| work_keys_str_mv | AT yangwenjie designofalowvoltageinputoutputrailtorailcmosbuffer |