IDDQ testing for deep sub-micron SOC
The focus of this project is to study the application of new IDDQ testing schemes to deep-submicron SoC (System on Chip), for example, a 32-bit DSP microcontroller. Power partitioning has been applied to reduce the circuit scale under test from design point of view.
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| Formato: | Tese |
| Publicado em: |
2008
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| Acesso em linha: | http://hdl.handle.net/10356/3891 |