IDDQ testing for deep sub-micron SOC
The focus of this project is to study the application of new IDDQ testing schemes to deep-submicron SoC (System on Chip), for example, a 32-bit DSP microcontroller. Power partitioning has been applied to reduce the circuit scale under test from design point of view.
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| Other Authors: | |
| Format: | Thesis |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/3891 |
| _version_ | 1826118845962649600 |
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| author | Ye, Xiaocheng. |
| author2 | Lau, Wai Shing |
| author_facet | Lau, Wai Shing Ye, Xiaocheng. |
| author_sort | Ye, Xiaocheng. |
| collection | NTU |
| description | The focus of this project is to study the application of new IDDQ testing schemes to deep-submicron SoC (System on Chip), for example, a 32-bit DSP microcontroller. Power partitioning has been applied to reduce the circuit scale under test from design point of view. |
| first_indexed | 2024-10-01T04:50:12Z |
| format | Thesis |
| id | ntu-10356/3891 |
| institution | Nanyang Technological University |
| last_indexed | 2024-10-01T04:50:12Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/38912023-07-04T15:01:54Z IDDQ testing for deep sub-micron SOC Ye, Xiaocheng. Lau, Wai Shing School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic systems The focus of this project is to study the application of new IDDQ testing schemes to deep-submicron SoC (System on Chip), for example, a 32-bit DSP microcontroller. Power partitioning has been applied to reduce the circuit scale under test from design point of view. Master of Science (Microelectronics) 2008-09-17T09:39:49Z 2008-09-17T09:39:49Z 2005 2005 Thesis http://hdl.handle.net/10356/3891 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Electronic systems Ye, Xiaocheng. IDDQ testing for deep sub-micron SOC |
| title | IDDQ testing for deep sub-micron SOC |
| title_full | IDDQ testing for deep sub-micron SOC |
| title_fullStr | IDDQ testing for deep sub-micron SOC |
| title_full_unstemmed | IDDQ testing for deep sub-micron SOC |
| title_short | IDDQ testing for deep sub-micron SOC |
| title_sort | iddq testing for deep sub micron soc |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Electronic systems |
| url | http://hdl.handle.net/10356/3891 |
| work_keys_str_mv | AT yexiaocheng iddqtestingfordeepsubmicronsoc |