Latchup characterization of submicrometer CMOS
The main purpose of this project is to study the latchup phenomenon in submicrometer CMOS devices and investigate the effects of spike annealing process on latchup sensitivity. Latchup characterization was carried out by a steady-state latchup triggering method.
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| Other Authors: | |
| Format: | Thesis |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/4163 |
| _version_ | 1811683360340180992 |
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| author | Chow, Jane Sze Mun. |
| author2 | Zhang, Qing |
| author_facet | Zhang, Qing Chow, Jane Sze Mun. |
| author_sort | Chow, Jane Sze Mun. |
| collection | NTU |
| description | The main purpose of this project is to study the latchup phenomenon in submicrometer CMOS devices and investigate the effects of spike annealing process on latchup sensitivity. Latchup characterization was carried out by a steady-state latchup triggering method. |
| first_indexed | 2024-10-01T04:11:30Z |
| format | Thesis |
| id | ntu-10356/4163 |
| institution | Nanyang Technological University |
| last_indexed | 2024-10-01T04:11:30Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/41632023-07-04T15:12:45Z Latchup characterization of submicrometer CMOS Chow, Jane Sze Mun. Zhang, Qing School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits The main purpose of this project is to study the latchup phenomenon in submicrometer CMOS devices and investigate the effects of spike annealing process on latchup sensitivity. Latchup characterization was carried out by a steady-state latchup triggering method. Master of Science (Microelectronics) 2008-09-17T09:45:51Z 2008-09-17T09:45:51Z 2003 2003 Thesis http://hdl.handle.net/10356/4163 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Chow, Jane Sze Mun. Latchup characterization of submicrometer CMOS |
| title | Latchup characterization of submicrometer CMOS |
| title_full | Latchup characterization of submicrometer CMOS |
| title_fullStr | Latchup characterization of submicrometer CMOS |
| title_full_unstemmed | Latchup characterization of submicrometer CMOS |
| title_short | Latchup characterization of submicrometer CMOS |
| title_sort | latchup characterization of submicrometer cmos |
| topic | DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits |
| url | http://hdl.handle.net/10356/4163 |
| work_keys_str_mv | AT chowjaneszemun latchupcharacterizationofsubmicrometercmos |