Design of low voltage micropower asynchronous datapath modules for a multiplierless FIR filter
In this dissertation, we propose three novel low power 16-bit circuit modules for the datapath of an FIR filter: (i) Multiplierless-based Multiplier, (ii) 2's-Complement-In-Sign-Magnitude-Out Adder, and (iii) Latch Accumulator.
| मुख्य लेखक: | |
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| अन्य लेखक: | |
| स्वरूप: | थीसिस |
| प्रकाशित: |
2008
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| विषय: | |
| ऑनलाइन पहुंच: | http://hdl.handle.net/10356/4174 |