Design of high performance, low power latches and flip-flops
With the advent of hand-held computing devices that require functionality rivaling the desktop, Low Power, High Performance systems have become the norm rather than the exception. The clocking network with its 20-40% contribution to the overall power dissipation is becoming a major obstacle in imp...
| Κύριος συγγραφέας: | |
|---|---|
| Άλλοι συγγραφείς: | |
| Μορφή: | Thesis |
| Γλώσσα: | English |
| Έκδοση: |
2011
|
| Θέματα: | |
| Διαθέσιμο Online: | http://hdl.handle.net/10356/42657 |