Median filtering for image denoising with FPGA implementation

Median filtering for image denoising with FPGA implementation

In this thesis, FPGA is chosen as the implementation platform based on an XSV-800 Virtex prototyping board from XESS Corporation. The focus of this thesis consists of three main parts: image acquisition, median filtering and image display, as well as two auxiliary parts.

Bibliografiske detaljer
Hovedforfatter: Gong, Wei.
Andre forfattere: Ma, Kai Kuang
Format: Thesis
Udgivet: 2008
Fag:
DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing
Online adgang:http://hdl.handle.net/10356/4305

Internet

http://hdl.handle.net/10356/4305

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