Design and analysis of low-power, variation-tolerant match-line sense amplifiers for large capacity content addressable memories (CAMs) in 65 nm CMOS process
Content Addressable Memory (CAM) is extensively used in many high speed data searching applications due to its high speed and single clock cycle throughput characteristics. However, this comes at a cost of high power consumption mainly due to the match line sense amplifier. Therefore, a lot of works...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2011
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| Online Access: | http://hdl.handle.net/10356/45740 |