Design of phase detector for PLL based clock and data recovery circuits

89 p.

Bibliographic Details
Main Author:	Sawant Ketan Suresh.
Other Authors:	Goh Wang Ling
Format:	Thesis
Published:	2011
Subjects:	DRNTU::Engineering::Electrical and electronic engineering
Online Access:	http://hdl.handle.net/10356/46924

Internet

http://hdl.handle.net/10356/46924