Self-aligned dual damascene processing technique to improve copper interconnect performance
Improving the process and reliability of copper via-line metallization using a proposed novel self-aligned dual damascene approach for the 0.13 urn technology generation. Collective process issues when implementing industrial primary DD approaches led to the invention of the DD approach.
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| Other Authors: | |
| Format: | Thesis |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/4931 |
| _version_ | 1826116249100222464 |
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| author | Neo, Chin Chuan |
| author2 | Goh, Wang Ling |
| author_facet | Goh, Wang Ling Neo, Chin Chuan |
| author_sort | Neo, Chin Chuan |
| collection | NTU |
| description | Improving the process and reliability of copper via-line metallization using a proposed novel self-aligned dual damascene approach for the 0.13 urn technology generation. Collective process issues when implementing industrial primary DD approaches led to the invention of the DD approach. |
| first_indexed | 2024-10-01T04:08:14Z |
| format | Thesis |
| id | ntu-10356/4931 |
| institution | Nanyang Technological University |
| last_indexed | 2024-10-01T04:08:14Z |
| publishDate | 2008 |
| record_format | dspace |
| spelling | ntu-10356/49312023-07-04T16:28:27Z Self-aligned dual damascene processing technique to improve copper interconnect performance Neo, Chin Chuan Goh, Wang Ling School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering Improving the process and reliability of copper via-line metallization using a proposed novel self-aligned dual damascene approach for the 0.13 urn technology generation. Collective process issues when implementing industrial primary DD approaches led to the invention of the DD approach. Master of Engineering 2008-09-17T10:01:42Z 2008-09-17T10:01:42Z 2004 2004 Thesis http://hdl.handle.net/10356/4931 Nanyang Technological University application/pdf |
| spellingShingle | DRNTU::Engineering::Electrical and electronic engineering Neo, Chin Chuan Self-aligned dual damascene processing technique to improve copper interconnect performance |
| title | Self-aligned dual damascene processing technique to improve copper interconnect performance |
| title_full | Self-aligned dual damascene processing technique to improve copper interconnect performance |
| title_fullStr | Self-aligned dual damascene processing technique to improve copper interconnect performance |
| title_full_unstemmed | Self-aligned dual damascene processing technique to improve copper interconnect performance |
| title_short | Self-aligned dual damascene processing technique to improve copper interconnect performance |
| title_sort | self aligned dual damascene processing technique to improve copper interconnect performance |
| topic | DRNTU::Engineering::Electrical and electronic engineering |
| url | http://hdl.handle.net/10356/4931 |
| work_keys_str_mv | AT neochinchuan selfaligneddualdamasceneprocessingtechniquetoimprovecopperinterconnectperformance |