Design and implementation of a digital system of elementary function computation on FPGA device
The integrated Add-Table lookup-Add (iATA) is a memory efficient algorithm for computing elementary functions. In the iATA method, an elementary function is implemented in tables and the outputs of the tables are then summed to obtain the value of the function. Xilinx 7-Series FPGA is used to implem...
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| フォーマット: | Final Year Project (FYP) |
| 言語: | English |
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2012
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| オンライン･アクセス: | http://hdl.handle.net/10356/49575 |