Design and implementation of a digital system of elementary function computation on FPGA device

The integrated Add-Table lookup-Add (iATA) is a memory efficient algorithm for computing elementary functions. In the iATA method, an elementary function is implemented in tables and the outputs of the tables are then summed to obtain the value of the function. Xilinx 7-Series FPGA is used to implem...

詳細記述

書誌詳細
第一著者: Wu, Yujie.
その他の著者: Jong Ching Chuen
フォーマット: Final Year Project (FYP)
言語:English
出版事項: 2012
主題:
オンライン・アクセス:http://hdl.handle.net/10356/49575