Development of a rapid prototyping of FPGA-based digital multiplier
This report is devoted for the implemented of different kinds of multipliers on reconfigurable hardware FPGA using VHDL. The main focuses are on the speed, area of the multiplier and performance comparison. Hardware Multiplication is a basic function often required for system applications such as DS...
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| フォーマット: | Final Year Project (FYP) |
| 言語: | English |
| 出版事項: |
2012
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| オンライン･アクセス: | http://hdl.handle.net/10356/50174 |