Design of a high speed and power efficient quarter-rate clock and data recovery circuit

Due to the advantage in technology and multi-media, the demand for data communication has increased tremendously. More standards for high speed low power communication have been established, i.e. Serial Advanced-Technology Attachment (SATA), Peripheral Component Interconnect Express (PCIe), Universa...

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Bibliografski detalji
Glavni autor: Tan, Yung Sern
Daljnji autori: Yeo Kiat Seng
Format: Disertacija
Jezik:English
Izdano: 2012
Teme:
Online pristup:https://hdl.handle.net/10356/50667