Low power asynchronous digital signal processor
This thesis pertains to the design of a digital signal processor (DSP) with emphasis on lowpower for power-sensitive applications such as battery-operated embedded systems. The low-power attribute is largely obtained by means of exploiting the idiosyncrasies of asynchronous-logic, an emerging design...
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Format: | Thesis |
Language: | English |
Published: |
2013
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Online Access: | http://hdl.handle.net/10356/52419 |