Development of an advanced nano-satellite VELOX-I – study of column-level ADC architectures for high speed CMOS image sensors
This Final Year Project (FYP) is to design a 10-bit Column-Parallel Analog-to-Digital Convertor (ADC) using CMOS technology. This ADC design is used as a part of High Speed CMOS Image Sensors, and this design must be satisfy the requirements of size and speed. The main concern of this design is c...
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| 格式: | Final Year Project (FYP) |
| 语言: | English |
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2013
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| 在线阅读: | http://hdl.handle.net/10356/54468 |