Cycle time optimization of semiconductor wafer fabrication system using simulation

Focuses mainly on batch size decision policies as part of cycle time optimization techniques. A simplified semiconductor wafer fabrication system model is built by using a simulation tool, ProModel. Then a particular product type is selected to run the simulation model.

Bibliographic Details
Main Author: Kyaw, Soe Nyunt.
Other Authors: Sivakumar, Appa Iyer
Format: Thesis
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/5920