Platform for multi-gate InxGa1-xAs nanostructure nmosfet by top-down approach
Scaling of conventional planar Si-based CMOS technology is reaching its limits towards the 16 nm technology node and further downscaling does not guarantee exponential performance improvement anymore due to various process control and reliability issues and fundamental constraints. Therefore, other...
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| Format: | Praca dyplomowa |
| Język: | English |
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2014
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| Dostęp online: | http://hdl.handle.net/10356/60541 |