Low power 16-bit multiplier design
The aim of this project is to investigate the design of different 16-bit CMOS Multiplier based on different logic and its implementation for portable low power applications. Arithmetic circuits such as digital adders and multipliers are used extensively in digital signal processor for filtering appl...
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| Format: | Final Year Project (FYP) |
| Language: | English |
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2015
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| Online Access: | http://hdl.handle.net/10356/62023 |