FPGA-based investigation of coding and detection for non-volatile memories
The low-density parity-check (LDPC) codes are by far the best error-correction codes discovered till date, providing exceptional performances that verge on the theoretical boundary, otherwise known as the Shannon limit. Yet, in the process of manipulating its enticing features, modern LDPC applicati...
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Formatua: | Thesis |
Hizkuntza: | English |
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2015
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Sarrera elektronikoa: | http://hdl.handle.net/10356/63280 |