Power-stage design for switched- mode DC-DC converter
This project pertains to the design of power transistors for a high switching-frequency DC-DC converter. We investigate the optimum tapering factor to design the buffer for the power transistors. Simulation results of the power transistors with the buffer designed with the optimum tapering factor sh...
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| Format: | Final Year Project (FYP) |
| Language: | English |
| Published: |
2015
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| Online Access: | http://hdl.handle.net/10356/63517 |