Hardware-accelerated shortest path computation
Shortest path computations are used in numerous applications such as transportation and network routing. As our demand for speed increases, we would have to respond with new ideas to implement these computations. This paper presents an architecture for Bellman-Ford shortest path computation that...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Final Year Project (FYP) |
| Language: | English |
| Published: |
2016
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/10356/66755 |