Automated DFT verification and pattern generation methodology for mixed signal SoC
Design for Test (DFT) is a complex and critical activity in modern SoC design cycle. A typical SoC has multiple IPs with different test requirements. The verification of these test schemes is usually addressed ad-hoc in a project which leads to missing test cases and delay in project schedules. More...
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| Format: | Thesis |
| Language: | English |
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2018
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| Online Access: | http://hdl.handle.net/10356/73118 |