High performance VLSI arithmetic macrocells

High performance VLSI arithmetic macrocells

To investigate various techniques such as redundant arithemtic and residue number systems to produce large arithemtic functions in the form of VLSI macrocells capable of process independent reuse in systems incorporating standard on-chip bus sytems.

Bibliographic Details
Main Authors: Thambipillai Srikanthan, Damodaran Radhakrishnan, Premkumar, Annamalai Benjamin
Other Authors: School of Applied Science
Format: Research Report
Published: 2008
Subjects:
DRNTU::Engineering::Computer science and engineering::Computer systems organization::Processor architectures
Online Access:http://hdl.handle.net/10356/8120

Internet

http://hdl.handle.net/10356/8120

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