Zedwulf: Power-Performance Tradeoffs of a 32-Node Zynq SoC Cluster

Commodity SoCs with hybrid architectures that combine CPUs with programmable FPGA fabric such as the Xilinx Zynq SoC have become a competitive energy-efficient platform for addressing irregular parallelism in graph problems. In this paper, we prototype a 32-node cluster composed from these Zynq SoC...

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Bibliographic Details
Main Authors: Moorthy, Pradeep, Kapre, Nachiket
Other Authors: School of Computer Engineering
Format: Conference Paper
Language:English
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/83649
http://hdl.handle.net/10220/39205