Meta-stability immunity technique for high speed SAR ADCs

An 8-bit 4 GS/s 8-channel time-interleaved successive approximation register (SAR) analogue-to-digital converter (ADC) is presented. To enhance the ENOB (effective number of bits), a meta-stability immunity technique is proposed, which utilises pre-installation to eliminate uncertain decision. The t...

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Bibliographic Details
Main Authors: Qiu, Lei, Tang, Kai, Zheng, Yuanjin, Siek, Liter
Other Authors: School of Electrical and Electronic Engineering
Format: Journal Article
Language:English
Published: 2018
Subjects:
Online Access:https://hdl.handle.net/10356/87752
http://hdl.handle.net/10220/45528