Passive circuit designs toward terahertz using nanometer CMOS technology
This paper presents terahertz passive circuit design and investigation by using a 180 nanometer CMOS technology. A novel multimode bandpass filter and a power divider are designed by adopting a thin-film microstrip line, which uses silicon oxide layer of CMOS as the microstrip substrate. The circuit...
Main Authors: | Ma, Kaixue, Zhang, Leyu, Yeo, Kiat Seng |
---|---|
Other Authors: | School of Electrical and Electronic Engineering |
Format: | Conference Paper |
Language: | English |
Published: |
2010
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/90677 http://hdl.handle.net/10220/6287 http://ieeexplore.ieee.org/search/freesrchabstract.jsp?tp=&arnumber=5403789&queryText%3DPassive+Circuit+Designs+toward+Terahertz+using+Nanometer+CMOS+Technology%26openedRefinements%3D*%26searchField%3DSearch+All http://www.isic2009.org/ |
Similar Items
-
A 60GHz on-chip antenna in standard CMOS silicon technology
by: Yang, Wanlan, et al.
Published: (2013) -
A low power millimetre-wave VCO in 0.18 µm SiGe BiCMOS technology
by: Ye, Wanxin, et al.
Published: (2013) -
Scalable compact modeling for nanometer CMOS technology
by: See, Guan Huei
Published: (2009) -
A charge-trapping-based technique to design low-voltage BiCMOS logic circuits
by: Rofail, Samir S., et al.
Published: (2009) -
Design exploration of hybrid CMOS and memristor circuit by new modified nodal analysis
by: Fei, Wei, et al.
Published: (2012)