Scalable and modular memory-based systolic architectures for discrete Hartley transform
In this paper, we present a design framework for scalable memory-based implementation of the discrete Hartley transform (DHT) using simple and efficient systolic and systolic-like structures for short and prime transform lengths, as well as, for lengths 4 and 8. We have used the proposed short-lengt...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
2011
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10356/94247 http://hdl.handle.net/10220/7091 |